We built an 8-bit CPU as 2nd year EE students
Details
- External ID
- 48546549
- Source
- HN
- Company
- —
- Product
- We built an 8-bit CPU as 2nd year EE students
- Website domain
- github.com
- Launched
- June 15, 2026
- Cohort
- —
- Upvotes
- 108
- Upvotes percentile
- 0.9221311475409836
- Tags
- —
- Fetched at
- Sept. 7, 2026, 9:26 p.m.
- Updated at
- Sept. 7, 2026, 9:26 p.m.
Description
Hi! me and my friends together built an 8 bit CPU implemented in Logisim purely from scratch. The control unit of this system does not implement the generic microcode ROM or any kind of RAM. This was made purely from discrete logic gates and coded the system to run different programs.key features: Custom 16-instruction Harvard ISA, 8-bit fixed format, 4 general purpose registersHardwired control unit built entirely from AND/OR gate logic matrixDual-phase clocking to eliminate race conditionsBootstrap Control Unit that cold-boots via ROM-to-RAM transfer Early-exit conditional branching that saves upto 25% cycles when conditions aren't metFull design specification document with version controlSince this was our first time doing such teamwork and a new thing we used RISC based system that fetches an 8-bit instruction from Instruction memory 4 bits of which translate to an instruction the last two bits are for source and destination registers. There are a total of 4 registers in the system with two memory units namely Data SRAM and I SRAM, the system follows a Harvard architecture.There are design discrepancies too since it was our first time designing such a system and on top of that completely hardwired too.To solve the problem of cold booting a bootloader is present too that copies the contents of a temporary ROM into instruction RAM and then hands over the reins to the CPU.We also implemented conditional branching as well as early exit branching too that only checks for zero or carry flag and branches without wasting cycles, if the conditions are not met the Program counter increments.Moreover we also created a complete documentation with version control describing each necessary part assuming prior knowledge.Please take a look at it at https://github.com/c0rRupT9/STEPLA-1For future development I want to implement a RISC CPU using FPGA's and connect it to an actual DRAM. We are also selling the full spec document and Logisim files for $5 to fund our passion https://tcfdiq.gumroad.com/l/zyyux Thankyou!
Enrichment
- Theme
- lightweight and on-device AI runtimes
- Vertical
- Horizontal
- Function
- Hardware & robotics
- Audience
- Developer
- AI stance
- Not AI
- Project type
- Hobby / open-source project
- Normalized one-liner
- 8-bit cpu built by students
- Manually corrected
- False
Could you build this?
Partial Designing an 8-bit CPU in Logisim with hardwired discrete logic rather than microcode requires rigorous digital logic design and Boolean circuit optimization that LLMs cannot reliably synthesize without human electrical engineering verification.
What it would actually take: The design involves drawing and simulating gate-level schematics in Logisim or HDL: crafting an ALU, program counter, instruction decoder, registers, and a hardwired finite state machine (FSM) using flip-flops and combinatorial logic instead of microcode ROMs. The hard part is ensuring glitch-free timing, hazard handling, and complete state machine validation without race conditions across instruction cycles. It requires formal digital logic design education and hardware verification skills.
Discussion
20 comments analyzed.
Competitors mentioned: Alchitry Cu FPGA board, ARM processors, RISC-V, GPUs and AI accelerators
Concerns raised: Universities lacking hardware kits and FPGA boards for students, Breadboard implementations difficult to manage with many wires, Timing skew and capacitance issues in physical implementations, Steep learning curve deterring students from hardware
Feature requests: Custom PCB design for control unit, Interrupt support for deterministic processor behavior, Harvard architecture for simpler control logic
Competitors
Other products that read as similar to this one — 91 launches clear the similarity bar, closest 8 shown.
Attention rank: #6 of 92 (itself plus its competitors, highest first — normalized so YC and Product Hunt are compared fairly).
Launched 228 days after the earliest competitor.
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- Anos · hn · 2026-04-04 · 115 upvotes · similarity 0.42
Other launches for this product
- No other launches for this product.
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