Nicheloom

Market intelligence for builders — see what's gaining traction before it's crowded.

m6502, a 6502 CPU for FPGAs and Tiny Tapeout

Details

External ID
47057387
Source
HN
Company
—
Product
m6502, a 6502 CPU for FPGAs and Tiny Tapeout
Website domain
github.com
Launched
Feb. 18, 2026
Cohort
—
Upvotes
5
Upvotes percentile
0.10512129380053908
Tags
—
Fetched at
Sept. 7, 2026, 9:25 p.m.
Updated at
Sept. 7, 2026, 9:25 p.m.

Description

Hey HN,Recently built an Apple II emulator and at the same time was getting into Tiny Tapeout and decided it would be cool to build a cycle-accurate 6502 CPU and an MCU for it. It's cycle accurate and the core itself should be 100% compatible with a stock MOS 6502 (would need to still test this though!).Tested on some FPGAs (fomu, ulx3s) and works great, hoping to get it taped out in the upcoming IHP26a shuttle.Also as part of the project I built a bus multiplexer to allow memory/bus access from an RP2040 to work around the limited pin count on Tiny Tapeout. This let's you load up programs on RP2040 and the CPU can read/write from it.

Enrichment

Theme
lightweight and on-device AI runtimes
Vertical
Horizontal
Function
Hardware & robotics
Audience
Developer
AI stance
Not AI
Project type
Hobby / open-source project
Normalized one-liner
6502 cpu implementation for fpgas
Manually corrected
False

Could you build this?

No Developing a cycle-accurate hardware CPU core in HDL (Verilog/VHDL) targeted for ASIC tapeout requires specialized electrical engineering and digital circuit design expertise.

What it would actually take: The implementation requires writing Verilog or SystemVerilog that accurately models every cycle, bus transaction, and internal state register of the MOS 6502, verified against formal test suites. For Tiny Tapeout, it must pass strict DRC/LVS checks and synthesize within extreme gate count and pinout limits using open-source EDA tools like OpenLane and Yosys. This requires specialized knowledge of digital logic synthesis, hardware timing closure, and silicon layout design.

Discussion

1 comment analyzed.

Competitors mentioned: cocotb test benches, Klaus functional tests

Concerns raised: Test coverage gaps between simulation and physical hardware, IRQ servicing edge cases not caught by tests

Competitors

Other products that read as similar to this one — 137 launches clear the similarity bar, closest 8 shown.

Attention rank: #135 of 138 (itself plus its competitors, highest first — normalized so YC and Product Hunt are compared fairly).

Launched 112 days after the earliest competitor.

Other launches for this product

Same idea, different domain

Nobody's really built a hardware & robotics tool for Fintech yet.