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GPU-Based Autorouting for KiCad

Details

External ID
45750356
Source
HN
Company
—
Product
GPU-Based Autorouting for KiCad
Website domain
github.com
Launched
Oct. 29, 2025
Cohort
—
Upvotes
8
Upvotes percentile
0.5094339622641509
Tags
—
Fetched at
Sept. 7, 2026, 9:25 p.m.
Updated at
Sept. 7, 2026, 9:25 p.m.

Description

This project began when I decided it would be easier to write an autorouter than route a 8000+ net backplane by hand.This is a KiCad plugin with a few different algorithms, the coolest of which is a 'Manhattan routing grid' autorouter that routes along orthogonal traces. The basic idea was to steal an algorithm from FPGA routing and apply it to PCBs. I'm using CuPy for speeding up the routing; CPU-bound is at least 10x slower than the GPU version.This is in a very pre-alpha state, but it does _technically_ work. It's not great by any measure but then again it is an autorouter.I have a writeup with the how and why it was made: https://bbenchoff.github.io/pages/OrthoRoute.htmlAnd a video showing it route a 512-net backplane in just over 2 minutes: https://www.youtube.com/watch?v=KXxxNQPTagAThis is very cool and one of the first good uses of the KiCad IPC API that was released a few months ago. If this sounds interesting and useful, PRs and issues welcome.

Enrichment

Theme
gpu compute and acceleration tools
Vertical
Manufacturing
Function
Dev tools
Audience
Developer
AI stance
AI feature
Project type
Hobby / open-source project
Normalized one-liner
gpu-accelerated circuit autorouting for kicad
Manually corrected
False

Could you build this?

No Developing high-performance GPU-accelerated autorouting algorithms for dense multi-layer PCB nets involves complex computational geometry and low-level parallel programming.

What it would actually take: Building this requires writing a C++/CUDA or WebGPU engine interfaced via KiCad's plugin architecture. It entails mapping PCB design rule checks (DRC), keepouts, and multi-layer trace geometries to a Manhattan grid or cellular automata, executing massively parallel pathfinding (like A* or Lee's maze router) on GPU hardware, and handling topological rip-up and reroute logic. This demands deep expertise in GPU compute optimization, EDA (Electronic Design Automation), and graph routing algorithms.

Discussion

6 comments analyzed.

Concerns raised: Doesn't handle impedance control, length matching, or differential pairs, Very expensive hobby project with limited practical applications, Only useful for very small subset of very complex boards

Feature requests: Add impedance control support, Add length matching support, Add differential pairs support

Competitors

Other products that read as similar to this one — 105 launches clear the similarity bar, closest 8 shown.

Attention rank: #63 of 106 (itself plus its competitors, highest first — normalized so YC and Product Hunt are compared fairly).

Looks like the first mover among its competitors.

Other launches for this product

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