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Today: 1,953 launches · Niche of the day: specialized calculation tools · See what launched today →

Write, simulate and synthesize VHDL/Verilog in the browser

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HN · launched Jul 23, 2026 · 19 upvotes (top 30%) · 0 views

Niche: open-source hardware and maker electronics · 180 launches, 3 in the last 7 days ▼ -73% · Explore this niche →

Category and tags

  • Horizontal
  • Dev tools
  • Developer
  • Not AI
  • Hobby / open-source project

Visit website ↗ Source listing ↗

Could you build this?

No Compiling, simulating, and synthesizing VHDL/SystemVerilog in the browser requires porting complex open-source EDA tools (GHDL, Icarus Verilog, Yosys) to WebAssembly or running isolated sandboxed container runtimes with interactive waveform renderers.

What it would actually take: A production implementation requires compiling complex C/C++ EDA toolchains (Yosys, GHDL, Icarus) to WebAssembly with Emscripten or running low-latency Linux microVMs/containers (e.g. Firecracker). The frontend needs custom hardware netlist visualization (ELK/Graphviz) and dynamic VCD waveform parsing into canvas-based viewers. This requires specialized knowledge in hardware description languages, compiler tooling, and WebAssembly compilation of large native C++ codebases.

Discussion

4 comments analyzed.

Competitors mentioned: Visual Studio, Vivado, Quartus, Xcode, Android Studio

Concerns raised: 12-month access limitation instead of unlimited lifetime access, EDA tools have poor user experience and steep setup barriers for beginners

Competitors

Other products that read as similar to this one : 1573 launches clear the similarity bar, closest 8 shown.

Attention rank: #488 of 1574 (itself plus its competitors, highest first, normalized so YC and Product Hunt are compared fairly).

Launched 265 days after the earliest competitor.

The niche, labels, vibe code rating and competitor comparison on this page are analysis by Nicheloom. If you use them, please credit nicheloom.com. How you may use our data.