i — An experimental tensor DSL/compiler with explicit scheduling
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HN · launched Jun 2, 2026 · 5 upvotes (top 87%) · 0 views
Niche: programming language compilers · 77 launches, 2 in the last 7 days ▼ -60% · Explore this niche →
Category and tags
- Horizontal
- Dev tools
- Developer
- Not AI
- Hobby / open-source project
Visit website ↗ Source listing ↗
More like this: all 77 launches in programming language compilers →
Could you build this?
No Building a domain-specific compiler with tensor IR representations, polyhedral loop transformations, and explicit GPU/hardware scheduling is a hardcore compiler engineering problem.
What it would actually take: The project requires an AST/intermediate representation (IR) supporting tensor operations, an explicit scheduling language (similar to Halide or TVM), loop tiling/vectorization algorithms, and backends lowering to LLVM or CUDA/SPIR-V. Implementing this demands deep expertise in compiler architecture, polyhedral compilation theory, GPU microarchitecture, and memory hierarchy optimization.
Discussion
1 comment analyzed.
Competitors mentioned: Triton, TVM, Halide
Concerns raised: Not fast yet, Proof-of-concept stage, Small ecosystem/Python front-end
Competitors
Other products that read as similar to this one : 3447 launches clear the similarity bar, closest 8 shown.
Attention rank: #2921 of 3448 (itself plus its competitors, highest first, normalized so YC and Product Hunt are compared fairly).
Launched 214 days after the earliest competitor.
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