compressed-cache-fpga
A Pipelined Compressed Cache Architecture with Runtime Reconfigurable Associativity and Hazard Forwarding for FPGA Platforms
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GITHUB · launched Oct 26, 2026 · 14 upvotes (top 79%) · 0 views
Niche: gpu infrastructure and developer tools · 129 launches, 7 in the last 7 days ▼ -30% · Explore this niche →
Category and tags
- Horizontal
- Hardware & robotics
- Developer
- Not AI
- Hobby / open-source project
Visit website ↗ Source listing ↗
More like this: all 129 launches in gpu infrastructure and developer tools →
Could you build this?
No This is a hardware microarchitecture design for a pipelined compressed cache on FPGA, with runtime-reconfigurable associativity and hazard forwarding. It requires RTL design, hardware verification, and FPGA toolchain expertise.
Competitors
Other products that read as similar to this one : 2176 launches clear the similarity bar, closest 8 shown.
Attention rank: #1681 of 2177 (itself plus its competitors, highest first, normalized so YC and Product Hunt are compared fairly).
Launched 362 days after the earliest competitor.
- UL-SMF · hn · 2026-08-17 · 13 upvotes · similarity 0.73
- unixpc · github · 2026-11-06 · 27 upvotes · similarity 0.64
- Reverse-engineered the FPGA bitstream using Claude Code · hn · 2026-04-06 · 6 upvotes · similarity 0.64
- computer_architecture_a_quantitative_approach · github · 2026-11-06 · 42 upvotes · similarity 0.59
- Taliesin · hn · 2026-06-04 · 10 upvotes · similarity 0.59
- KVBoost · hn · 2026-05-22 · 20 upvotes · similarity 0.58
- tinysd · github · 2026-10-24 · 78 upvotes · similarity 0.57
- MiniKV · github · 2026-10-14 · 10 upvotes · similarity 0.57
The niche, labels, vibe code rating and competitor comparison on this page are analysis by Nicheloom. If you use them, please credit nicheloom.com. How you may use our data.